Thanks for your code snippet, Leon.
FYI my high level code works too; ADEN must simply be
set before ADSC (enable bit or bit 7 must be set before
Start Conversion bit or bit 6). Otherwise bit 6 can't be set.

Viviane

>Here is a snippet of code that performs A/D conversion on the ATmega103,
>which is very similar to the m128. Per Atmel's recommendation, the
>processor is in SLEEP mode to reduce noise while the conversion is in
>process.
>
>{ ---------------------------------------------------------------------
>Analog inputs
>
>@ADC Samples the ADC for a given channel
>--------------------------------------------------------------------- }
>
>$DE EQU ADC-GO \ Start an ADC sample at 50-200 KHz
>
>CODE @ADC ( chan -- val)
> TL ADMUX OUT
> $A0 R16 LDI R16 MCUCR OUT \ Enable sleep mode
> ADC-GO R16 LDI R16 ADCSR OUT \ Start the sampling
> SLEEP
> BEGIN ADIE ADCSR SBIC AGAIN \ Await end of sample
> ADCL TL IN ADCH TH IN \ Read the sample
> R0 CLR R0 ADCSR OUT \ Disable the ADC
> RET END-CODE
>
>LABEL <ADC>
> ADIE ADCSR CBI RETI END-CODE
>
><ADC> ADCCaddr INTERRUPT
>
>
>> -----Original Message-----
>> From: swiftx-bounce_at_forth.com [mailto:swiftx-bounce_at_forth.com]On Behalf
>> Of Viviane.Beullens
>> Sent: Tuesday, September 02, 2003 9:46 AM
>> To: swiftx_at_forth.com
>> Subject: [swiftx] ADSC bit in ADCSR
>>
>>
>>
>> Hi,
>>
>> I am working with the ATmega128 and am trying to do
>> A/D conversion. It seems to be enough simple and
>> the code below should do it.
>> THe problem I have is I can't set bit 6 of the
>> ADCSR (ADSC bit).
>> Did some of you encountered the same problem?
>>
>>
>> Thanks in advance for any useful info you can provide.
>>
>> Viviane Beullens
>>
>> \ Code
>>
>>
>> TARGET
>>
>> |U| |S| |R| BACKGROUND SCRIBE
>>
>> VARIABLE RESULT
>>
>> \ Select in ADMUX inputpin 0 in PORTF
>> : selectMUX0
>> ADMUX c@ 1 OR ADMUX C! ;
>>
>> \ Request a conversion setting ADSC bit in ADCSR, bit 6
>> : SetADSC ADCSR C@ 64 OR ADCSR C! ;
>>
>> \ Set enable bit in ADCSR, ADEN, bit 7
>> : SetADEN
>> ADCSR C@ 128 OR ADCSR C! ;
>>
>> \ Disable ADEN
>> : DISABLEADEN
>> ADCSR C@ 127 AND ADCSR C! ;
>>
>> \ Read result when ADIF is high
>> : READRES ( f -- )
>>
>> ADCL C@ RESULT 1+ C! ADCH C@ RESULT C! ;
>>
>>
>> \ Do conversion until ADIF bit is set
>> : DoA/D
>> BEGIN
>> selectMUX0 SetADSC SetADEN
>> ADCSR C@ 16 AND
>> UNTIL
>> READRES
>> DISABLEADEN RESULT @ . ;
>>
>> : SCRIBEACT SCRIBE ACTIVATE BEGIN PAUSE DOA/D AGAIN ;
>>
>>
>>
>> : /SCRIBE 0 RESULT ! SCRIBE BUILD ;
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Received on Tue Sep 02 2003 - 14:41:08 PDT