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SLEEP in AD conversion (ATM128)

From: Viviane.Beullens <Viviane.Beullens_at_brutele.be>
Date: Fri, 05 Sep 2003 14:24:45 +0200

Leon,

In the A/D conversion code you sent me (here below) I am left with some
questions.

DE EQU ADC-GO \ Start an ADC sample at 50-200 KHz

CODE @ADC ( chan -- val)
   TL ADMUX OUT
   $A0 R16 LDI R16 MCUCR OUT \ Enable sleep mode
   ADC-GO R16 LDI R16 ADCSR OUT \ Start the sampling
   SLEEP
   BEGIN ADIE ADCSR SBIC AGAIN \ Await end of sample
   ADCL TL IN ADCH TH IN \ Read the sample
   R0 CLR R0 ADCSR OUT \ Disable the ADC
   RET END-CODE

LABEL <ADC>
   ADIE ADCSR CBI RETI END-CODE

<ADC> ADCCaddr INTERRUPT

You were not sure about where exactly to place the SLEEP instruction
for the ATM128 and you thought BEGIN in the code
sample may need to be placed before the SLEEP instruction.
For my answer on this problem, see below.

I'd like first to put another question concerning
the following line:
$A0 R16 LDI R16 MCUCR OUT

$A0 is in binary: 10100000
- why did you enable here the SRE bit in the MCUCR?

Now back to the SLEEP problem.
For the place of the SLEEP instruction, as
I understand ATMEL's recommendations in the datasheet,
one must
1. Make sure that the ADC is enabled and is not busy converting. Single
Conversion mode must be selected and the ADC conversion complete interrupt
must be enabled.
2. Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a
conversion once the CPU has been halted.

According to this advice, the SLEEP instruction should be placed
after ADEN is enabled and before starting the conversion.
Seems this plausible to you?

Between the two stept I should enter ADC noise reduction mode.
For this to do
bit SM0 should be set in MCUCR. But in the REG_M128
the MCUCR has only bit 7 to bit 4.
Bit SM0 is bit 2 in MCUCR.
Is there maybe something I didn't see?

This said, your code works, but I can't test it - there is never
noise during a AD conversion, whether in sleep mode or not.

Thanks in advance for some advice,
Viviane

---------------------------------------------

>{ ---------------------------------------------------------------------
>Analog inputs
>
>@ADC Samples the ADC for a given channel
>--------------------------------------------------------------------- }
>
>$DE EQU ADC-GO \ Start an ADC sample at 50-200 KHz
>
>CODE @ADC ( chan -- val)
> TL ADMUX OUT
> $A0 R16 LDI R16 MCUCR OUT \ Enable sleep mode
> ADC-GO R16 LDI R16 ADCSR OUT \ Start the sampling
> SLEEP
> BEGIN ADIE ADCSR SBIC AGAIN \ Await end of sample
> ADCL TL IN ADCH TH IN \ Read the sample
> R0 CLR R0 ADCSR OUT \ Disable the ADC
> RET END-CODE
>
>LABEL <ADC>
> ADIE ADCSR CBI RETI END-CODE
>
><ADC> ADCCaddr INTERRUPT
>
>
>> -----Original Message-----
>> From: swiftx-bounce_at_forth.com [mailto:swiftx-bounce_at_forth.com]On Behalf
>> Of Viviane.Beullens
>> Sent: Tuesday, September 02, 2003 9:46 AM
>> To: swiftx_at_forth.com
>> Subject: [swiftx] ADSC bit in ADCSR
>>
>>
>>
>> Hi,
>>
>> I am working with the ATmega128 and am trying to do
>> A/D conversion. It seems to be enough simple and
>> the code below should do it.
>> THe problem I have is I can't set bit 6 of the
>> ADCSR (ADSC bit).
>> Did some of you encountered the same problem?
>>
>>
>> Thanks in advance for any useful info you can provide.
>>
>> Viviane Beullens
>>
>> \ Code
>>
>>
>> TARGET
>>
>> |U| |S| |R| BACKGROUND SCRIBE
>>
>> VARIABLE RESULT
>>
>> \ Select in ADMUX inputpin 0 in PORTF
>> : selectMUX0
>> ADMUX c@ 1 OR ADMUX C! ;
>>
>> \ Request a conversion setting ADSC bit in ADCSR, bit 6
>> : SetADSC ADCSR C@ 64 OR ADCSR C! ;
>>
>> \ Set enable bit in ADCSR, ADEN, bit 7
>> : SetADEN
>> ADCSR C@ 128 OR ADCSR C! ;
>>
>> \ Disable ADEN
>> : DISABLEADEN
>> ADCSR C@ 127 AND ADCSR C! ;
>>
>> \ Read result when ADIF is high
>> : READRES ( f -- )
>>
>> ADCL C@ RESULT 1+ C! ADCH C@ RESULT C! ;
>>
>>
>> \ Do conversion until ADIF bit is set
>> : DoA/D
>> BEGIN
>> selectMUX0 SetADSC SetADEN
>> ADCSR C@ 16 AND
>> UNTIL
>> READRES
>> DISABLEADEN RESULT @ . ;
>>
>> : SCRIBEACT SCRIBE ACTIVATE BEGIN PAUSE DOA/D AGAIN ;
>>
>>
>>
>> : /SCRIBE 0 RESULT ! SCRIBE BUILD ;
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Received on Fri Sep 05 2003 - 05:29:46 PDT

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