Hi Leon

I agree that the first version, 52B01000, is an allowed opcode. It does not do what is required. The instruction is designed to index into a table and we are going to add a long value. Thus the size of the index also needs to be 4 as in the second example, 52B01400. I know the second examples is correct for the task at hand. I just moved and cannot try the first example on a 68332, but I seam to remember that it produces an odd address error depending on the value in D1.

>it is interesting that both versions have exactly the same dasm as shown in the following example.

code test ok
1 #q 0 d1 +x a0) add ok
rts end-code ok

see test
110870 1 #Q 0 D1 +X A0) ADD 52B01000
110874 RTS 4E75 ok

code test1 ok
cdata $52b01400 , idata ok
rts ok
end-code ok
see test1
110880 1 #Q 0 D1 +X A0) ADD 52B01400
110884 RTS 4E75 ok

At 08:22 PM 10/15/2003 -0700, you wrote:
>I believe the example you cite both assembles and disassembles correctly.

>> 1142F6 1 #Q 0 D1 +X A0) ADD 52B01000 <==== should be
>52B01400
>
>Let's take a closer look.
>
>1st word of opcode:
> Bits[15:12] 0101
> Bits[11:9] 001 data ( 1 #Q )
> Bit[8] 0
> Bits[7:6] 10 size (long)
> Bits[5:3] 110 mode (d8,An,Xn)
> Bits[2:0] 000 reg (A0)
>
>2nd word (brief extension format) of opcode:
> Bit[15] 0 D/A (index is a data register)
> Bits[14:12] 001 Reg (D1)
> Bit[11] 0 W/L (index is sign-extended word)
> Bits[10:9] 00 Scale (00=scale *1)
> Bit[8] 0
> Bits[7:0] 0..0 Displacement (0)
>
>Your proposal is for the second word to be 1400 which means the scale field
>of the opcode extension word would be 10 which specifies a scale of *4.
>
>--Leon
>
>
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Received on Fri Oct 17 2003 - 10:39:05 PDT