The benchmarks in the table below show the performance gains achieved by using the optimizing compiler included in SwiftX Pro. Also shown are some simple examples of source code and the resulting optimized versions.
Because such optimization on microcontrollers with relatively limited resources results in nearly negligible results, figures are given here only for processors which show significant improvement with this feature enabled.
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Not optimized |
Optimized |
Improvement |
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|
68332 |
Size |
Time |
Size |
Time |
Size |
Time |
|
Sieve |
110 |
563 |
104 |
289 |
5.5% |
48.7% |
|
Fib |
36 |
1875 |
30 |
1078 |
16.7% |
42.5% |
|
Qsort |
648 |
180 |
610 |
148 |
5.9% |
17.8% |
|
CF5307 |
Size |
Time |
Size |
Time |
Size |
Time |
|
Sieve |
140 |
32 |
114 |
16 |
18.6% |
50.0% |
|
Fib |
36 |
122 |
28 |
66 |
22.2% |
45.9% |
|
Qsort |
650 |
8 |
542 |
6 |
16.6% |
25.0% |
*Code optimization has the most impact on MCUs such as those listed in the above table, which take advantage of the Freescale BDM. Results on MCUs with fewer resources (see 68HC12 example below) are likely to be more modest but, depending on the application, still significant.
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Example #1 — 68K code without optimizer |
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ColdFire code is similar, but it is not identical because it does not implement the full 68K instruction set. 1944 X1 BSR 61EE 1946 A6 ) A0 MOV 2056 1948 A0 ) A6 ) MOV 2C90 194A X2 BSR 61F0 194C A6 )+ A0 MOV 205E 194E A6 )+ A0 ) MOV 209E 1950 RTS 4E75 |
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Example #1 — 68K code, optimized |
193C X1 AB X2 AB MOV 23F90000C6140000C618 1946 RTS 4E75 |
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